John
Reed, now head of The Reed Company,
was part of the Intel 1103 team. He has offered the following remarks on
the development of the Intel 1103, which he was kind enough to submit to
"Inventors".
The "invention?" In those days, Intel, (nor few others for that matter),
was not focusing on getting patents or achieving "inventions" so much as
they were desperate to get new products to market and begin reaping the
profits. But let me tell you how the i1103 was born and raised:
In approximately. 1969, William Regitz of Honeywell canvassed the semiconductor
companies of the U.S. looking for someone to share in the development of
a dynamic memory circuit based on a novel 3-transistor cell which he (or
one of his co-workers) had invented. I won't elaborate, but this cell was
a "1X, 2Y" type cell laid out with a "butted" contact for connecting the
pass transistor drain to the gate of the cell's current switch.
Regitz talked to many companies, but Intel got really excited about
the possibilities here and decided to go ahead with a development program.
Moreover, whereas Regitz had originally been proposing a 512-bit chip,
Intel decided that 1,024 bits would be feasible, and so the program began.
Joel Karp of Intel was the circuit designer, and he worked closely with
Regitz throughout the program. It culminated in actual working units, and
a paper was given on this device, the i1102, at the 1970 ISSCC conference
in Philadelphia.
Intel learned several lessons from the i1102, namely:
-
DRAM cells needed substrate bias. This spawned the 18 pin DIP package.
-
The "butting" contact was a tough technological problem to solve, and yields
were low.
-
The "IVG" multi-level cell strobe signal made necessary by the "1X, 2Y"
cell circuitry caused the devices to have very small operating margins.
Though they continued to develop the i1102, there was a need to look at
other cell techniques. Ted Hoff had proposed all possible ways of wiring
up 3 transistors in a DRAM cell earlier, and at this time somebody took
a closer look at the "2X, 2Y" cell, I think it may have been Karp and/or
Leslie Vadasz. (I hadn't come to Intel yet) The idea of using a "buried
contact" was applied (probably by Tom Rowe, process guru), and this cell
became more and more attractive, since it could potentially do away with
both the butting contact issue and the aforementioned multi-level signal
requirement and yield a smaller cell to boot!
So Vadasz and Karp sketched out a schematic of an i1102 alternative
(on the sly, since this wasn't exactly a popular decision with Honeywell),
and assigned the job of designing the chip to Bob Abbott sometime before
I came on the scene in June 1970. He initiated the design and had it laid
out. I took over the project after initial "200X" masks had been shot from
the original mylar layouts, and it was my job to evolve the product from
there which was no small task in itself.
Well, it's hard to make a long story short, but the first silicon chips
of the i1103 were practically non-functional, until it was discovered that
the overlap between the "PRECH" clock and the "CENABLE" clock, the famous
"Tov" parameter, was VERY critical due to our lack of understanding of
internal cell dynamics. This was a discovery made by test engineer George
Staudacher. Nevertheless, understanding this weakness, I characterized
the devices on hand, and we drew up a data sheet. Because of the low yields
we were seeing,due to the "Tov" problem, Vadasz and I recommended to Intel
management that the product wasn't ready for market, but Bob Graham, then
Intel Marketing V.P., thought otherwise and pushed for an early introduction,
over our dead bodies so to speak. The Intel i1103 "came to market" in October
of 1970.
After the product introduction, demand was strong, and it was my job
to evolve the design for better yield. I did this in stages, making improvements
at every new mask generation until the "E" revision of the masks, at which
point, the i1103 was yielding well and performing well. This early work
of mine established a couple of things:
-
Based on my analysis of 4 runs of devices, the refresh time was set at
2 milliseconds. Binary multiples of that initial characterization are still
the standard to this day.
-
I was probably the first designer to use Si-gate transistors as bootstrap
capacitors; my evolving mask sets had several of these to improve performance
and margins.
And that's about all I can say about the Intel 1103's "invention." I will
say that "getting inventions" was just not a value amongst us circuit designers
of those days. I am personally named on 14 memory-related patents, but
in those days, I'm sure I invented many more techniques in the course of
getting a circuit developed and out to market without stopping to make
any disclosures. That Intel itself wasn't concerned about patents until
"too late" is evidence, in my own case, by the 4 or 5 patents I was awarded,
applied for and assigned to 2 years after I left the company at the end
of 1971! (Look at one of them, and you'll see me listed as an Intel employee!)
- John Reed |